The present invention relates to devices used for the amplification of electrical signals within a data storage device. More specifically, the present invention involves an improved write amplifier which drives a magnetic write head, which is used to write data onto magnetic media.
A magnetic write head is used in a variety of devices wherein data, or a data pattern, is written onto a magnetic media, such as a disk in a hard drive in a typical personal computer. To write a data pattern onto a magnetic medium, a sequence of bits comprising a data pattern is transformed into a series of current pulses of alternating polarity for the respective 1 or 0 values of the bits. The final circuit that creates these current pulses and drives them through the magnetic head is called a write amplifier or write driver. The data to be written by the write head is referred to herein as "write data".
An example of a prior art write amplifier 300 is shown in FIG. 1. Write amplifier 300 includes an emitter coupled differential pair of transistors Q1 10 and Q2 20. The emitters are coupled to a current source established by a transistor Q3 70, resister RW 80 and a negative supply V-. The collectors of transistors Q1 and Q2 are coupled by a respective one of resistors RC1 50 and RC2 60 to a positive supply V+. A magnetic write head 40 is coupled across the collectors of transistors Q1 and Q2.
In the operation of amplifier 300, a differential signal representation of the write data is applied to the inverting and non-inverting inputs of an input differential receiver U1 30, which has two outputs, one being the inverted form of the other. The outputs of differential receiver 30 are coupled to the bases of the emitter coupled transistors Q1 and Q2. As a function of the successive bit values of the write data, one of transistors Q1 and Q2 is switched on and the other is switched off, to effect control of the direction of current from the collector of transistors Q1 and Q2 through the magnetic write head 40. Resistors RC1 50 and RC2 60 are each used to bias a corresponding collector of the emitter coupled pair Q1 and Q2. The values of RC1 50 and RC2 60 are typically much larger than the resistance of the write head 40, so that most of the current switched by the emitter coupled pair is driven through the write head 40.
The magnitude of the write current, i.e., the magnitude of the current driven through the write head 40 from the emitter coupled pair Q1, Q2, is a function of the current source formed by transistor Q3 70, resistor RW 80 as driven by an operational amplifier (OP AMP) U2 90 and digital-to-analog converter (DAC) 100. DAC 100 is user-controlled to provide a voltage at its output that is applied to the non-inverting input of U2. The inverting input of U2 is coupled to the emitter Q3. The output of U2 drives the base of Q3. With this configuration, a desired current is provided from the collector of Q3 to the emitters of Q1 and Q2. Most of that current is delivered to the collectors of the differential emitter coupled pair Q1 and Q2, and from there, through the write head 40 in a direction corresponding to the successive bits of the applied write data.
The prior art amplifier 300 depicted in FIG. 1 has several important disadvantages which limit its utility. Some of these disadvantages have become increasingly limiting in recent years because of the miniaturization of magnetic heads and increasing data rates, thereby diminishing the attractiveness and utility of this relatively simple amplifier circuit 300. Several of those disadvantages are described below.
One such disadvantage relates to the voltage drop across the resistors RC1 50 and RC2 60, which varies as a function of the current delivered by the programmed DAC 100. When that current is small, the voltage drop is small too, and the output common-mode voltage at the magnetic head 40 is close to the positive supply V+, which is a severe problem for magneto-resistive (MR) type heads which are easily damaged by such a high voltage. Ideally, the DC voltage between the head 40 and the disk (not shown) should be zero volts.
Another disadvantage of the write amplifier 300 is that the current through the write head 40, is controlled to be only approximately established by the programmed setting of DAC 100. The difference in current from the programmed value is due to the collector currents of the respective bipolar transistors Q1 10, Q2 20, and Q3 70 being inherently unequal to their emitter currents. Furthermore, the differences in the currents of the respective transistors vary with temperature and the absolute value of the current, and as a consequence, cannot easily be calibrated and adjusted out.
Additionally, there is a problem with the quality of the switching current waveform achievable from the amplifier circuit 300. Ideally, the waveform is a square wave. However, there is a resonant circuit established by the equivalent inductance of the emitters of Q1 10 and Q2 20, and the equivalent capacitance of the collector of Q3 70. The resonant circuit causes a transient condition during switching which propagates to the collectors of Q1 10 and Q2 20, resulting in undershoot and overshoot in the nominal square are write current going into the write head 40.
Additionally, when the switching voltage at the bases of transistors Q1 and Q2 is significantly more than that required to fully steer the current through either one of the two transistors, additional overshoot and undershoot may occur.
It is therefore clear that the prior art amplifier circuit 300 of FIG. 1 has several significant disadvantages. Accordingly, it is desirable to address these disadvantages and achieve, among other benefits, lower common-mode voltage at the write head 40, better control over the write current, and reduced overshoot and undershoot.